Timetable

Title Type Location Serial Start End All Day
Project Session Project Session E1 5 029 2 08.01.25 08.01.25 No 
Project Session Project Session E1 5 029 2 22.01.25 22.01.25 No 
Project Session Project Session E1 5 029 2 15.01.25 15.01.25 No 
PS1 Verilog & Project Primer Project Session E1 5 029 2 30.10.24 30.10.24 No 
PS2 HW Design Tools, Debuggers Etc Project Session E1 5 029 2 06.11.24 06.11.24 No 
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