Timetable

Title Type Location Serial Start End All Day
PS2 HW Design Tools, Debuggers Etc Project Session E1 5 029 2 06.11.24 06.11.24 No 
PS1 Verilog & Project Primer Project Session E1 5 029 2 30.10.24 30.10.24 No 
L1 System Design Terminologies Lecture E1 5 029 1 25.10.24 25.10.24 No 
Kick Off Meeting Lecture E1 4 024 18.10.24 18.10.24 No 
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