Timetable

Title Type Location Serial Start End All Day
PS7 Memory Models Project Session E1 5 029 2 11.12.24 11.12.24 No 
PS8 Open Project Kickoff Project Session E1 5 029 2 18.12.24 18.12.24 No 
Lecture Lecture E1 5 029 1 13.12.24 13.12.24 No 
Lecture Lecture E1 5 029 1 10.01.25 10.01.25 No 
L3 Accelerator Classification Part 2 Lecture E1 5 029 1 15.11.24 15.11.24 No 
L2 Accelerator Classification Part 1 Lecture E1 5 029 1 08.11.24 08.11.24 No 
L1 System Design Terminologies Lecture E1 5 029 1 25.10.24 25.10.24 No 
L4 Hardware Resources Lecture E1 5 029 1 22.11.24 22.11.24 No 
L5 Software Resources Lecture E1 5 029 1 29.11.24 29.11.24 No 
PS1 Verilog & Project Primer Project Session E1 5 029 2 30.10.24 30.10.24 No 
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